SIL verification

After completing the basic design of the Safety Instrumented System (SIS),
engineers should ensure the proposed design can meet the reliability targets defined
for each Safety Instrumented Function (SIF) in the SIS. At this stage, the following
values are normally calculated:
– Probability of random hardware failure (PFDavg or PFH)
– Architectural constraints (redundancy in the hardware design)
– Spurious trip rate.

Calculating these values can be complex and involves a large number of
parameters, including hardware failure rate data. It is normally done using dedicated
software such as xSeriCon’s SILability™.

xSeriCon’s extensive experience in SIL verification allows us to efficiently carry out
SIL verification for you, at reasonable cost and with rapid turnaround. We will
recommend remedial measures if the targets are not met. We can also provide
training and review, if you prefer to execute SIL verification in-house.